CREATION OF ALGORITHMS FOR CALCULATING COEFFICIENTS IN PARTIAL POLYNOMIAL BASES OF KHAAR

Authors

  • Tojinur Normo‘min o‘g‘li Abdirayimov (TATU 209-21 group master)

Keywords:

Blackfin processors family; ADSPBF561 processors; dual-core processors; processor architecture; digital signal processing; Haar basis function;

Abstract

In this article, parallel algorithms have been developed for digital signal processing on piecewise-polynomial basis of Haar which is based on Analog Devices' Blackfin ADSP-BF561 dual-core processors. Based on these algorithms, developing of dual-core parallel computing program on VisualDSP++ has been considered. Functional descriptions of the Blackfin ADSPBF561 dual-core processor architecture are given. The architecture and components of the processor core have been described.

References

Allen Dj. Architecture processors for digital signal processing. M .: Technosphere, 2006, 279p.

Sotnikov A. Features of architecture and programming of dual-core processors of the Blackfin family ADSP-BF561 // Components and technologies. 2007. №6.

Valpa O.D. Development of devices based on digital signal processors of the company Analog Devices with the use of Visual DSP++. - M .: Hot line - Telekom, 2007. - 270 p.

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Published

2022-12-28

How to Cite

Abdirayimov, T. N. o‘g‘li. (2022). CREATION OF ALGORITHMS FOR CALCULATING COEFFICIENTS IN PARTIAL POLYNOMIAL BASES OF KHAAR. INTERNATIONAL CONFERENCES, 1(20), 24–26. Retrieved from http://erus.uz/index.php/cf/article/view/797

Issue

Vol. 1 No. 20 (2022): INTERNATIONAL CONFERENCE ON INNOVATIVE DEVELOPMENT OF EDUCATION” 2022/20

Section

Articles